The present invention relates generally to the field of manufacture of electronic devices. In particular, the present invention relates to the manufacture of integrated circuits containing low dielectric constant material.
As electronic devices become smaller, there is a continuing desire in the electronics industry to increase the circuit density in electronic components, e.g., integrated circuits, circuit boards, multichip modules, chip test devices, and the like without degrading electrical performance, e.g., crosstalk or capacitive coupling, and also to increase the speed of signal propagation in these components. One method of accomplishing these goals is to reduce the dielectric constant of the interlayer, or intermetal, insulating material used in the components. A method for reducing the dielectric constant of such interlayer, or intermetal, insulating material is to incorporate within the insulating film very small, uniformly dispersed pores or voids.
A variety of organic and inorganic dielectric materials are known in the art in the manufacture of electronic devices, particularly integrated circuits. Suitable inorganic dielectric materials include silicon dioxide and organo polysilicas. Suitable organic dielectric materials include thermosets such as polyimides, polyarylene ethers, polyarylenes, polycyanurates, polybenzazoles, benzocyclobutenes and the like.
In general, porous dielectric materials are prepared by first incorporating a removable porogen into a B-staged dielectric material, disposing the B-staged dielectric material containing the removable porogen onto a substrate, curing the B-staged dielectric material and then removing the polymer to form a porous dielectric material. For example, U.S. Pat. No. 5,895,263 (Carter et al.) discloses a process for forming an integrated circuit containing porous organo polysilica dielectric material. U.S. Pat. No. 6,093,636 (Carter et al.) discloses a process for forming an integrated circuit containing porous thermoset dielectric material. In each of these patents, the process described requires the step of forming the porous dielectric material prior to any subsequent processing steps.
Porous dielectric materials have a reduced, and possibly substantially reduced, dielectric constant as compared to the same dielectric materials without the presence of pores. However, in certain circumstances, the presence of such pores are problematic. For example, apertures etched into such porous dielectric materials suffer from sidewall roughness due to the pores or voids in the dielectric material. Such sidewall roughness creates difficulties in the subsequent deposition of metal layers such as barrier or seed layers. The barrier or seed layers are typically chemically or physically vapor deposited in a line of sight fashion. Thus, roughness in the aperture sidewalls tends to create discontinuities in the barrier and/or seed layers. These discontinuities can adversely affect subsequent processing steps in the manufacture of and the performance of electronic devices.
There is thus a need for processes for manufacturing electronic devices including porous dielectric materials having barrier and/or seed layers that are substantially continuous in the apertures.